skalp v0.1.1 Released
First release of skalp — an intent-driven hardware description language with compile-time clock domain safety, built-in synthesis, and native FPGA place & route.
Hardware
SKALP: An Intent-Preserving Hardware Description Language with Compile-Time Clock Domain Safety and GPU-Accelerated Fault Simulation
Technical whitepaper describing SKALP’s four-stage IR pipeline, compile-time clock domain safety through the type system, GPU-accelerated fault simulation on Apple Metal, and integrated ISO 26262 functional safety analysis.
Design Patterns in Real skalp Code
What does production skalp code actually look like? A tour of design patterns from two real projects and the broader language specification — covering state machines, type-safe control loops, stream pipelines, clock domain safety, inline constraints, and more. Each pattern compared with SystemVerilog.
Null Convention Logic: Hardware That Doesn't Need a Clock
An introduction to Null Convention Logic — asynchronous, self-timed digital circuits that use dual-rail encoding and threshold gates instead of a global clock. Why it matters, how it works, and why skalp is the first toolchain to support it end-to-end.
BHDL — Board Hardware Description Language
A modern PCB description language written in Rust with flow-based syntax, design intent, power domain scalability, SPICE analysis, and ISO 26262 safety. ~306K lines across 18 crates.
skalp — Intent-Driven Hardware Description Language
A modern HDL written in Rust that preserves design intent from algorithm to gates, with compile-time clock domain safety and progressive refinement. ~221K lines across 24 crates.